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1-Wire EEPROM chip (4096-bit) with seven address inputs


4096-bit EEPROM, 2 port switch

1C [.]XXXXXXXXXXXX[XX][/[ latch.[0-1|ALL|BYTE] | PIO.[0-1|ALL|BYTE] | power | sensed.[0-1|ALL|BYTE] | polarity | por | set_alarm | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]

Family Code


Special Properties

latch.0 latch.1 latch.ALL latch.BYTE

read-write, binary
The 2 pins (PIO) latch a bit when their state changes, either externally, or through a write to the pin.
Reading the latch property indicates that the latch has been set.
Writing any data to ANY latch will reset them all. (This is the hardware design).
ALL is all latch states, accessed simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

Pio.0 Pio.1 Pio.all Pio.byte

read-write, yes-no
State of the open-drain output ( PIO ) pin. 0 = non-conducting = off, 1 = conducting = on.
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will return the switch setting. To determine the actual logic level at the switch, refer to the sensed.0 sensed.1 sensed.ALL sensed.BYTE property.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.


read-only, yes-no
Is the DS28E04 powered parasitically (=0) or separately on the Vcc pin (=1)?

sensed.0 sensed.1 sensed.ALL sensed.BYTE

read-only, yes-no
Logic level at the PIO pin. 0 = ground. 1 = high (~2.4V - 5V ). Really makes sense only if the PIO state is set to zero (off), else will read zero.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.


read-only, yes-no
Reports the state of the POL pin. The state of the POL pin specifies whether the PIO pins P0 and P1 power up high or low. The polarity of a pulse generated at a PIO pin is the opposite of the pin’s power-up state.
  1. PIO powers up 0
  2. PIO powers up 1


read-write, yes-no
Specifies whether the device has performed power-on reset. This bit can only be cleared to 0 under software control. As long as this bit is 1 the device will allways respond to a conditional search.


read-write, integer unsigned (0-333)
A number consisting of 3 digits XYY, where:
select source and logical term
1 latch OR
3 latch AND
select channel and polarity
0 Unselected (LOW)
1 Unselected (HIGH)
2 Selected LOW
3 Selected HIGH

All digits will be truncated to the 0-3 range. Leading zeroes are optional. Low-order digit is channel 0.


  1. Responds on Conditional Search when latch.1 or latch.0 are set to 1.
  2. Responds on Conditional Search when sensed.1 and sensed.0 are set to 0.
    000 (0)
    Never responds to Conditional Search.

    Standard Properties



    read-only, ascii
    The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
    address starts with the family code
    r address is the address in reverse order, which is often used in other applications and labeling.


    read-only, ascii
    The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).


    read-only, ascii
    The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).



    read-only, ascii
    The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
    r id is the id in reverse order, which is often used in other applications and labeling.



    read-only, ascii
    Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
    If no Link Locator is between the device and the master, the locator field will be all FF.
    r locator is the locator in reverse order.

    present (DEPRECATED)

    read-only, yes-no
    Is the device currently present on the 1-wire bus?


    read-only, ascii
    Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.


    Use the set_alarm property to set the alarm triggering criteria.



    1-wire is a wiring protocol and series of devices designed and manufactured by Dallas Semiconductor, Inc. The bus is a low-power low-speed low-connector scheme where the data line can also provide power.

    Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.

    The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.

    Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.

    OWFS design

    OWFS is a suite of programs that designed to make the 1-wire bus and its devices easily accessible. The underlying priciple is to create a virtual filesystem, with the unique ID being the directory, and the individual properties of the device are represented as simple files that can be read and written.

    Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.


    The DS28E04 (3) is a memory chip that bends the unique addressing capabilities of the 1-wire design. Some of the ID bits can be assigned by hardware.


    All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:
    Family Code
    8 bits
    48 bits
    8 bits

    Addressing under OWFS is in hexidecimal, of form:

    where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.

    The dot is optional, and the CRC code can included. If included, it must be correct.


    See Also


    owfs (1) owhttpd (1) owftpd (1) owserver (1) owdir (1) owread (1) owwrite (1) owpresent (1) owtap (1)

    Configuration and testing

    owfs (5) owtap (1) owmon (1)

    Language bindings

    owtcl (3) owperl (3) owcapi (3)


    DS1427 (3) DS1904(3) DS1994 (3) DS2404 (3) DS2404S (3) DS2415 (3) DS2417 (3)


    DS2401 (3) DS2411 (3) DS1990A (3)


    DS1982 (3) DS1985 (3) DS1986 (3) DS1991 (3) DS1992 (3) DS1993 (3) DS1995 (3) DS1996 (3) DS2430A (3) DS2431 (3) DS2433 (3) DS2502 (3) DS2506 (3) DS28E04 (3) DS28EC20 (3)


    DS2405 (3) DS2406 (3) DS2408 (3) DS2409 (3) DS2413 (3) DS28EA00 (3)


    DS1822 (3) DS1825 (3) DS1820 (3) DS18B20 (3) DS18S20 (3) DS1920 (3) DS1921 (3) DS1821 (3) DS28EA00 (3) DS28E04 (3) EDS0064 (3) EDS0065 (3) EDS0066 (3) EDS0067 (3) EDS0068 (3) EDS0071 (3) EDS0072 (3) MAX31826 (3)


    DS1922 (3) DS2438 (3) EDS0065 (3) EDS0068 (3)


    DS2450 (3)


    DS2890 (3)

    Multifunction (current, voltage, temperature)

    DS2436 (3) DS2437 (3) DS2438 (3) DS2751 (3) DS2755 (3) DS2756 (3) DS2760 (3) DS2770 (3) DS2780 (3) DS2781 (3) DS2788 (3) DS2784 (3)


    DS2423 (3)

    LCD Screen

    LCD (3) DS2408 (3)


    DS1977 (3)


    DS2406 (3) TAI8570 EDS0066 (3) EDS0068 (3)


    EEEF (3) DS2438 (3)



    Paul Alfille (

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